Innovation opportunities abound as entrepreneurs and investors seek ways to address AI scalability challenges.
PowerLattice, a Vancouver-based deep-tech startup focused on powering next-generation AI accelerators, emerged from stealth with $25 million in Series A funding to address power bottlenecks.
The round was co-led by Playground Global and Celesta Capital, both recognized investors in compute and semiconductor technologies, bringing PowerLattice’s total funding to $31 million.
PowerLattice’s core innovation is a power-delivery chiplet that delivers power directly into the processor package. By closely integrating power and compute, the chiplet reduces total compute power demand by over 50%, effectively doubling AI performance without requiring larger chips, expanded racks, or increased data center energy use.
“Power is the defining challenge for AI’s future,” said Dr. Peng Zou, Co-Founder, CEO and President of PowerLattice. “Data centers are already starting to hit a power wall, and the problem is only going to get worse if we don’t rethink how chips are powered. By bringing power directly into the processor package, we’re delivering the performance and efficiency AI needs to keep scaling beyond today’s limits.”
Solving AI’s Looming Power Crisis
AI accelerators and GPUs now exceed 2 kilowatts per chip, pushing data centers close to the limits of physical infrastructure and local power grids. Hyperscalers such as Amazon, Google, Meta, and Microsoft have noted that AI’s current power consumption is unsustainable.
Traditional power delivery architectures require electrical current to travel long, resistive paths before reaching the chip. This process wastes energy, generates excess heat, and can force systems to reduce performance. Without new solutions, industry analysts warn that U.S. data center power consumption could triple by 2028, reaching up to 12% of the nation’s electricity supply.
Playground Global General Partner Pat Gelsinger summed up the moment bluntly:
“AI is not constrained by capital—it’s constrained by power. PowerLattice represents a dramatic breakthrough in the efficiency and scale of power delivery. This is the kind of generational leap Playground backs: technology that doesn’t just advance chips, but reshapes the entire trajectory of computing.”
A Chiplet Built for the Next Era of Compute
PowerLattice’s innovation reduces the distance between power generation and consumption. The company’s power delivery chiplet integrates directly into the processor package, minimizing the overall footprint and eliminating long, resistive paths that waste energy.
The solution combines:
- Miniaturized on-die magnetic inductors
- Advanced voltage control circuitry
- A 3D vertical chiplet design
- A programmable software layer
By delivering power precisely where and when it is needed, PowerLattice addresses power bottlenecks that currently limit GPUs, CPUs, and AI accelerators.
“PowerLattice is delivering a truly scalable solution to attack the cost-performance, reliability, and cooling bottlenecks throttling AI data centers,” said Dr. Steve Fu, Partner at Celesta Capital. “I know how tough this problem is—after two decades of attempts across global semiconductor leaders, real breakthroughs ave been rare. PowerLattice’s solution is the unlock the industry has been waiting for.”
Impact: Doubling Performance, Halving Power
PowerLattice’s chiplet architecture enables three critical advantages:
1. Unlocking Chip Performance
By raising power limits and eliminating throttling, PowerLattice enables higher compute utilization. Performance can double, allowing more AI computation per rack without increasing power demand.
2. Cutting AI Power Consumption by 50%
By closely coupling power and compute, the chiplet reduces energy loss, lowering compute power needs by over 50% and providing direct cost and sustainability benefits.
3. Delivering AI-Grade Reliability at Scale
As AI clusters grow to hundreds of thousands of GPUs, PowerLattice offers reliability, enhancing stability, precision, and thermal performance across large, power-dense systems.
The company has developed silicon and is producing engineering samples for 1 kW+ GPUs, CPUs, and accelerators, indicating readiness for commercial deployment.
A Team Built for Breakthroughs
PowerLattice was founded by Peng Zou, Gang Ren, and Sujith Dermal, who bring expertise in analog IC, integrated magnetics, and system design. Their experience includes roles at Qualcomm, Intel, NUVIA, and a portfolio of issued and pending patents.
Pat Gelsinger of Playground Global and Dr. Steve Fu of Celesta Capital have joined the board, highlighting the strategic importance of this technology within the semiconductor value chain.
Powering the Future of AI
As AI continues to grow rapidly, the power wall has become a significant barrier to progress. PowerLattice’s power delivery chiplet introduces a new architecture that can scale with future compute demand while reducing power consumption, improving reliability, and enabling higher performance.
If power defines the next era of computing, PowerLattice aims to set new industry standards.
